ProjectScale4Edge – Scalable low-power RISC-V-based processor platform with application-specific AI accelerators

Basic data

Acronym:
Scale4Edge
Title:
Scalable low-power RISC-V-based processor platform with application-specific AI accelerators
Duration:
01/05/2020 to 31/12/2025
Abstract / short description:
Scale4Edge provides an ecosystem for a scalable and flexibly expandable edge computing platform based on the free RISC-V instruction set architecture. The ecosystem offers a scalable, customized complete solution including support. This also includes standards-compliant design processes, partially open-source software and also the safety (security) of the platform as well as an intensive review and analysis of the developments. The RISC-V platform of the ecosystem provides the user with three levels for implementation: (1) CPU instruction level, defined by the RISC-V ISA standard; (2) software level, defined by the C standard and complementary standards such as MISRA-C; and (3) operating system level with system services, resource allocations and configuration interfaces. The activities at the University of Tübingen aim at exploring and developing energy- and resource-efficient hardware accelerator architectures for a RISC-V platform to be used in edge computing systems that can be embedded in their environment in a well-tailored manner. This enables efficient processing of sensor data streams with an average electrical power consumption well below 1 mW.
Keywords:
machine learning
maschinelles Lernen
sensory
Sensorik
artificial intelligence
künstliche Intelligenz

Involved staff

Managers

Faculty of Science
University of Tübingen
Wilhelm Schickard Institute of Computer Science (WSI)
Department of Informatics, Faculty of Science

Local organizational units

Department of Informatics
Faculty of Science
University of Tübingen

Funders

Bonn, Nordrhein-Westfalen, Germany
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